Name: Xuehai Qian
Title: Full Professor
Email：xuehaiq@tsinghua.edu.cn
Education
Ph.D（Computer Science），University of Illinois at Urbana-Champaign，USA，2013
M.E（Computer Science and Technology），Institute of Computing Technology, Chinese Academy of Sciences，China，2007
B.E（Computer Science and Technology），Beihang University，China，2004
Employment
July 2024 - Present: Tenured Full Professor, Department of Computer Science, Tsinghua University
August 2022 – June 2024: Associate Professor, Purdue University, USA
August 2015 – August 2022: Assistant Professor, University of Southern California, USA
September 2013.9 – May 2015: Postdoctoral Researcher, University of California Berkeley, USA
Professional Service
SCIENCE CHINA (Information Sciences) ，Associate Editor （2023 - Present）
IEEE Transactions on Parallel and Distributed System Special Issue on Machine-Learning Architecture and Accelerators， Guest Editor（2019）
Research Areas
Computer architecture, computer system, hardware security
Research Overview
Xuehai Qian’s research focuses on parallel computer architecture, hardware/software co-designed domain-specific architectures and systems for graph analytics and machine learning, hardware security and quantum computer architecture. In parallel computer architecture area, he proposed the first scalable cache coherence protocols for atomic block execution, which can be leveraged to implement high performance sequential consistency for multiprocessors. He proposed the first hardware precise sequential consistency violation detection scheme and applied the ideas in deterministic record and replay for any relaxed memory consistency models, a well-known open problem in computer architecture community. In domain-specific architectures and systems for graph analytics, he proposed various architectures for graph processing leveraging emerging memory technology (e.g., processing-in-memory, ReRAM) to reduce and optimize data movements; he also proposed several novel distributed frameworks to optimize communication between distributed computing nodes and a specialized compiler to support advanced graph pattern mining algorithms. For machine learning, he proposed efficient synchronous and asynchronous protocols for decentralized training; with collaborators, developed several accelerator architectures with algorithm, architecture, and hardware technology co-design.
Xuehai Qian received NSF CRII and CAREER award, and led an NSF SPX project on FPGA-based machine learning platform, and other three small core NSF grants. He received the inaugural ACSIC (American Chinese Scholar In Computing) Rising Star Award. He has been induced into the “Hall of Fame” of all four top computer architecture conferences (ASPLOS, ISCA, MICRO, and HPCA). His students have been nominated for Microsoft Research Lovelace Fellowship, and Microsoft Research Ph.D Fellowship. One student was selected as Facebook Fellowship Finalist (3.5% among 2100 applicants) and awarded the Facebook Fellowship (less than 1% among all applicants). Two students were invited to attend Heidelberg Laureate Forum (HLF).
Awards and Honors
MICRO Hall of Fame，2021
ISCA Hall of Fame，2021
HPCA Hall of Fame，2019
ACSIC (American Chinese Scholar in Computing) Rising Star Award， 2019
IEEE Senior Member，2019
ASPLOS Hall of Fame, 2018
NSF CAREER Award, 2018
W.J. Poppelbaum Memorial Award (UIUC), 2013
Selected Publications
1. Jingji Chen, Xuehai Qian. Khuzdul: Efficient and Scalable Distributed Graph Pattern Mining Engine. In Proceedings of 28th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’23)
2. Jingji Chen, Xuehai Qian. DecoMine: A Compilation-based Graph Pattern Mining System with Pattern Decomposition. In Proceedings of 28th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’23)
3. Gengyu Rao, Jingji Chen, Jason Yik, Xuehai Qian. SparseCore: Stream ISA and Processor Specialization for Sparse Computation. In Proceedings of 27th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’22)
4. Jinglei Cheng, Haoqing Deng, Xuehai Qian. AccQOC: Accelerating Quantum Optimal Control Based Pulse Generation. In Proceedings of the 47th International Symposium on Computer Architecture (ISCA’20)
5. Youwei Zhuo, Jingji Chen, Qinyi Luo, Yanzhi Wang, Hailong Yang, Depei Qian, Xuehai Qian. SympleGraph: Distributed Graph Processing with Precise Loop-carried Dependency Guarantee. In Proceedings of 41st ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI’20)
6. Qinyi Luo, Jiaao He, Youwei Zhuo, Xuehai Qian. Prague: High-Performance Heterogeneity- Aware Asynchronouos Decentralized Training. In Proceedings of 25th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’20)
7. Qinyi Luo, Jinkun Lin, Youwei Zhuo, Xuehai Qian. HOP: Heterogeneity-Aware Decentralized Training. In Proceedings of 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’19)
8. Linghao Song, Xuehai Qian, Hai Li and Yiran Chen PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning. In Proceedings of The 23rd IEEE International Symposium on High- Performance Computer Architecture (HPCA’17)
9. Xuehai Qian, Benjamin Sahelices and Josep Torrellas. OmniOrder: Directory-Based Conflict Serialization of Transactions. In Proceedings of The 41st International Symposium on Computer Architecture (ISCA’14)
Xuehai Qian, Benjamin Sahelices, Josep Torrellas and Depei Qian. Volition: Precise and Scalable Sequential Consistency Violation Detection. In Proceedings of The 18th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’13)
